Showing posts with label conversion. Show all posts
Showing posts with label conversion. Show all posts
Friday, January 10, 2014
Long Range Direct Conversion Receiver
Using the circuit of direct-conversion receiver described here, one can listen to amateur radio QSO signals in CW as well as in SSB mode in the 40-metre band.
The circuit makes use of three n-channel FETs (BFW10). The first FET (T1) performs the function of ant./RF amplifier-cum-product detector, while the second and third FETs (T2 and T3) together form a VFO (variable frequency oscillator) whose output is injected into the gate of first FET (T1) through 10pF capacitor C16. The VFO is tuned to a frequency which differs from the incoming CW signal frequency by about 1 kHz to produce a beat frequency note in the audio range at the output of transformer X1, which is an audio driver transformer of the type used in transistor radios.
The audio output from transformer X1 is connected to the input of audio amplifier built around IC1 (TBA820M) via volume control VR1. An audio output from the AF amplifier is connected to an 8-ohm, 1-watt speaker.
The receiver can be powered by a 12-volt power-supply, capable of sourcing around 250mA current. Audio output stage can be substituted with a readymade L-plate audio output circuit used in transistor amplifiers, if desired. The necessary data regarding the coils used in the circuit is given in the circuit diagram itself.
Wednesday, April 10, 2013
A D Conversion Circuit for Single Ended MSB First Mode
This is a design circuit for analog to digital converter that can be used in data acquisition. This circuit is based on ADC0833 and controlled by INS8048. Before explaining the system configuration, it is worthwhile for one to understand the operation of the INS8048 processors I/O ports. Ports 1 and 2 are quasi-bidirectional; that is, they can be used as inputs or outputs while being statically latched. If a ``1 is written into any port bit, that bit can function as an input or as a high level output. If a ``0 is written into any port bit, that bit can function only as a low level output.
Outputs are latched until changed and inputs are unlatched and must be read immediately. When used with the ANL Pp, A (AND accumulator to port) or the ORL Pp, A (OR accumulator to port) instructions, these ports provide an efficient means of handling single line inputs and outputs. Port expansion, if anticipated, is handled via the lower four bits of Port 2. Only four pins of the processors Port 1 or Port 2 are needed for physical interfacing. The ANL or ORL instructions set up the port pins to produce the proper outputs (CS, CLK, and the multiplex address) or to allow for data input from the A/D converter.
[Circuit schematic source: National Semiconductor Notes].
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